ECE 6745

ECE 6745

Course information provided by the Courses of Study 2024-2025.

Principles and practices involved in the design, implementation, testing, and evaluation of complex standard-cell ASIC chips using automated state-of-the-art CAD tools. Topics include hardware description languages; CMOS logic, state, and interconnect fundamentals; chip design methodologies; automated cell-based design; CAD algorithms; details of accurately modeling ASIC delay, energy, and area; robustness issues; testing, verification, and debugging; power distribution and clocking; packaging and I/O. Includes a six-week open ended project where small groups of students design, implement, test, and evaluate an interesting technique in computer architecture using functional-, microarchitectural-, registertransfer-, and layout-level modeling.

When Offered Spring.

Prerequisites/Corequisites Prerequisite: ECE 4750.

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Syllabi: none
  •   Regular Academic Session.  Choose one lecture and one discussion.

  • 4 Credits Graded

  • 18873 ECE 6745   LEC 001

    • TR
    • Jan 21 - May 6, 2025
    • Batten, C

  • Instruction Mode: In Person

  • 18874 ECE 6745   DIS 201

    • F
    • Jan 21 - May 6, 2025
    • Batten, C

  • Instruction Mode: In Person