ECE 5740

Computer Architecture

Course Description

Course information provided by the Courses of Study 2024-2025.

This course aims to provide a strong foundation for students to understand modern computer system architecture and to apply these insights and principles to future computer designs. The course is structured around the three primary building blocks of general-purpose computing systems: processors, memories, and networks. The first half of the course focuses on the fundamentals of each building block. Topics include processor microcoding and pipelining; cache microarchitecture and optimization; and network topology, routing, and flow control. The second half of the course delves into more advanced techniques and will enable students to understand how these three building blocks can be integrated to build a modern shared-memory multicore system. Topics include superscalar execution, branch prediction, out-of-order execution, register renaming and memory disambiguation; VLIW, vector, and multithreaded processors; memory protection, translation, and virtualization; and memory synchronization, consistency, and coherence. This course includes a significant project decomposed into five lab assignments. Throughout the semester, students will gradually design, implement, test, and evaluate a complete multicore system capable of running real parallel applications at the register-transfer level.

When Offered Fall.

Permission Note Enrollment limited to: graduate students.
Prerequisites/Corequisites Prerequisite: ECE 3140/CS 3420 or CS 3410. Students should feel comfortable working with a hardware description language such as Verilog, SystemVerilog, or VHDL.

• Describe computer architecture concepts and mechanisms related to the design of modern processors, memories, and networks and explain how these concepts and mechanisms interact.
• Apply this understanding to new computer architecture design problems within the context of balancing application requirements against technology constraints; more specifically, quantitatively assess a design's execution time in cycles and qualitatively assess a design's cycle time, area, and energy.
• Evaluate various design alternatives and make a compelling quantitative and/or qualitative argument for why one design is superior to the other approaches.
• Demonstrate the ability to implement and verify designs of varying complexity at the register-transfer-levels.
• Create new designs at the register-transfer-level and the associated effective testing strategies.
• Write concise yet comprehensive technical reports that describe designs implemented at the register-transfer-levels, explain the testing strategy used to verify functionality, and evaluate the designs to determine the superior approach.

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