ECE 5755
Last Updated
- Schedule of Classes - January 15, 2024 7:50PM EST
- Course Catalog - January 15, 2024 7:28PM EST
Classes
ECE 5755
Course Description
Course information provided by the Courses of Study 2023-2024.
This Master's level course is designed to provide a hardware-centric overview of computer systems used in modern computing platforms. From the bottom up we will study the architecture of processor architectures (e.g., pipelined CPUs, ISA, RISC vs. CISC, out-of-order execution) and memory systems (e.g., memory hierarchy, caching, DRAM memories). We will understand how to evaluate the performance of modern processors and exploit parallelism in applications. This includes parallelization across multi-core CPUs, GPUs, and specialized hardware. Through ands-on assignments and an open-ended project students will develop a holistic understanding of modern computer systems and how they are designed.
When Offered Fall.
Outcomes
- Demonstrate an understanding of micro-architectural principles foundational computer architectures including processor pipelines, caching and memory systems, multi-core designs.
- Demonstrate an understanding of modern computer systems such as software parallelization strategies (e.g., ILP, TLP, DLP), hardware accelerators (e.g., GPUs, FPGAs, ASICs), and modern mobile and datacenter scale systems.
- Demonstrate the ability to analyze performance bottlenecks of software applications running on hardware platforms and optimize systems to maximize performance and efficiency.
Regular Academic Session.
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Credits and Grading Basis
3 Credits Stdnt Opt(Letter or S/U grades)
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Class Number & Section Details
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Meeting Pattern
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MW
Bloomberg Center 71
Cornell Tech - Aug 21 - Dec 4, 2023
Instructors
Gupta, U
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MW
Bloomberg Center 71
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Additional Information
Instruction Mode: In Person
Taught in NYC at Cornell Tech. Enrollment Limited to Cornell Tech Students only.
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